OP293FSZADI品牌芯片 集成电路 ADI模拟IC专卖
深圳市伟格兴电子科技有限公司
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    “OP293FSZADI品牌芯片 集成电路 ADI模拟IC专卖”详细信息
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深圳市伟格兴电子科技有限公司

AD7476A/AD7477A/AD7478A Data Sheet
Rev. G | Page 6 of 28
Parameter A Grade2 Unit Test Conditions/Comments
POWER REQUIREMENTS
VDD 2.35/5.25 V min/max
IDD Digital I/Ps = 0 V or VDD
Normal Mode (Static) 2.5 mA typ VDD = 4.75 V to 5.25 V, SCLK on or off
1.2 mA typ VDD = 2.35 V to 3.6 V, SCLK on or off
Normal Mode (Operational) 3.5 mA max VDD = 4.75 V to 5.25 V, fSAMPLE = 1 MSPS
1.7 mA max VDD = 2.35 V to 3.6 V, fSAMPLE = 1 MSPS
Full Power-Down Mode (Static) 1 μA max Typically 50 nA
Full Power-Down Mode (Dynamic) 0.6 mA typ VDD = 5 V, fSAMPLE = 100 kSPS
Power Dissipation6 0.3 mA typ VDD = 3 V, fSAMPLE = 100 kSPS
Normal Mode (Operational) 17.5 mW max VDD = 5 V, fSAMPLE = 1 MSPS
5.1 mW max VDD = 3 V, fSAMPLE = 1 MSPS
Full Power-Down Mode 5 μW max VDD = 5 V
1 Temperature range is from −40°C to +85°C. 2 Operational from VDD = 2.0 V, with input high voltage (VINH) 1.8 V minimum. 3 See the Terminology section. 4 SC70 values guaranteed by characterization.
5 Guaranteed by characterization.
6 See the Power vs. Throughput Rate section.
AD7478A SPECIFICATIONS
VDD = 2.35 V to 5.25 V, fSCLK = 20 MHz, fSAMPLE = 1 MSPS, TA = TMIN to TMAX, unless otherwise noted.1
Table 3.
Parameter A Grade2 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave
Signal-to-Noise-and-Distortion (SINAD)3 49 dB min
Total Harmonic Distortion (THD)3 −65 dB max
Peak Harmonic or Spurious Noise (SFDR)3 −65 dB max
Intermodulation Distortion (IMD)3
Second-Order Terms −76 dB typ fa = 100.73 kHz, fb = 90.7 kHz
Third-Order Terms −76 dB typ fa = 100.73 kHz, fb = 90.7 kHz
Aperture Delay 10 ns typ
Aperture Jitter 30 ps typ
Full Power Bandwidth 13.5 MHz typ At 3 dB
2 MHz typ At 0.1 dB
DC ACCURACY
Resolution 8 Bits
Integral Nonlinearity3 ±0.3 LSB max
Differential Nonlinearity3 ±0.3 LSB max Guaranteed no missed codes to eight bits
Offset Error3, 4 ±0.3 LSB max
Gain Error3, 4 ±0.3 LSB max
Total Unadjusted Error (TUE)3, 4 ±0.5 LSB max
ANALOG INPUT
Input Voltage Range 0 to VDD V
DC Leakage Current ±0.5 μA max
Input Capacitance 20 pF typ Track-and-hold in track; 6 pF typ when in hold

AD7476A/AD7477A/AD7478A Data Sheet
Rev. G | Page 4 of 28
Parameter A Grade2 B Grade2 Y Grade2 Unit Test Conditions/Comments
LOGIC OUTPUTS
Output High Voltage, VOH VDD – 0.2 VDD – 0.2 VDD – 0.2 V min ISOURCE = 200 μA; VDD = 2.35 V to 5.25 V
Output Low Voltage, VOL 0.4 0.4 0.4 V max ISINK = 200 μA
Floating-State Leakage Current ±1 ±1 ±1 μA max
Floating-State Output Capacitance6 5 5 5 pF max
Output Coding Straight (Natural) Binary
CONVERSION RATE
Conversion Time 800 800 800 ns max 16 SCLK cycles
Track-and-Hold Acquisition Time3 250 250 250 ns max
Throughput Rate 1 1 1 MSPS max See Serial Interface section
POWER REQUIREMENTS
VDD 2.35/5.25 2.35/5.25 2.35/5.25 V min/max
IDD Digital I/Ps = 0 V or VDD
Normal Mode (Static) 2.5 2.5 2.5 mA typ VDD = 4.75 V to 5.25 V, SCLK on or off
1.2 1.2 1.2 mA typ VDD = 2.35 V to 3.6 V, SCLK on or off
Normal Mode (Operational) 3.5 3.5 3.5 mA max VDD = 4.75 V to 5.25 V, fSAMPLE = 1 MSPS
1.7 1.7 1.7 mA max VDD = 2.35 V to 3.6 V, fSAMPLE = 1 MSPS
Full Power-Down Mode (Static) 1 1 1 μA max Typically 50 nA
Full Power-Down Mode (Dynamic) 0.6 0.6 0.6 mA typ VDD = 5 V, fSAMPLE = 100 kSPS
Power Dissipation7 0.3 0.3 0.3 mA typ VDD = 3 V, fSAMPLE = 100 kSPS
Normal Mode (Operational) 17.5 17.5 17.5 mW max VDD = 5 V, fSAMPLE = 1 MSPS
5.1 5.1 5.1 mW max VDD = 3 V, fSAMPLE = 1 MSPS
Full Power-Down Mode 5 5 5 μW max VDD = 5 V
3 3 3 μW max VDD = 3 V
1 Temperature ranges are as follows: A, B grades from –40°C to +85°C, Y grade from –40°C to +125°C. 2 Operational from VDD = 2.0 V, with input low voltage (VINL) 0.35 V maximum. 3 See the Terminology section. 4 B and Y grades, maximum specifications apply as typical figures when VDD = 4.75 V to 5.25 V. 5 SC70 values guaranteed by characterization.
6 Guaranteed by characterization.
7 See the Power vs. Throughput Rate section.

AD7476A/AD7477A/AD7478A Data Sheet
Rev. G | Page 12 of 28
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 7, Figure 8, and Figure 9 each show a typical FFT plot for
the AD7476A, AD7477A, and AD7478A, respectively, at a
1 MSPS sample rate and 100 kHz input frequency. Figure 10
shows the **-to-noise-and-distortion ratio performance vs.
the input frequency for various supply voltages while sampling
at 1 MSPS with an SCLK frequency of 20 MHz for the AD7476A.
Figure 11 and Figure 12 show INL and DNL performance for
the AD7476A. Figure 13 shows a graph of the total harmonic
distortion vs. the analog input frequency for different source
impedances when using a supply voltage of 3.6 V and sampling
at a rate of 1 MSPS (see the Analog Input section). Figure 14
shows a graph of the total harmonic distortion vs. the analog
input ** frequency for various supply voltages while
sampling at 1 MSPS with an SCLK frequency of 20 MHz

-/gbacgee/-

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